Research Statement
My research focuses on ultra-high-speed analog-to-digital converters (ADCs) and mixed-signal integrated circuit design. I study architectures and circuit techniques that improve sampling bandwidth, conversion accuracy, energy efficiency, and calibration robustness.
Current interests include time-interleaved ADCs, pipeline/SAR architectures, high-speed input buffers, reference systems, dynamic comparators, and digital mismatch calibration.
Research Areas
Ultra-high-speed ADCs
Time-interleaved and pipeline/SAR data converters for high-bandwidth sampling.
Mixed-signal IC design
Analog front ends, references, comparators, buffers, and digital calibration circuits.
Data-converter calibration
Mismatch modeling, time-skew estimation, and robust digital correction methods.
Current Topics
Ultra-high-speed ADC architectures
Architecture and circuit co-design for high-bandwidth data converters.
Calibration and system nonidealities
Behavioral modeling, time-skew estimation, and digital correction for time-interleaved converters.
Research Approach
The work connects transistor-level circuit design with system-level modeling and verification, with an emphasis on reproducible analysis and practical implementation constraints.