Research Interests

• Ultra-high-speed ADCs
• Mixed-signal integrated circuit design
• Data converters
• VLSI design

Education

• 2024.09 - 2029.06

  Ph.D. student in Integrated Circuit Science and Engineering

  GPA: 3.78/4.0; rank: top 10%. Research direction: ultra-high-speed ADC. Advisors: Xinyu Liu and Xuan Guo.

  Institute of Microelectronics, Chinese Academy of Sciences, University of Chinese Academy of Sciences

  Beijing, China

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• 2020.09 - 2024.06

  B.S. in Electronic Science and Technology

  GPA: 3.8/4.0; rank: 8/134.

  School of Physics and Microelectronics, Hunan University

  Changsha, China

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Selected Publications

• A 12-bit 78.8-dB SFDR 625-MS/s Two-step Pipelined-SAR ADC With Self-Adaptive Common-Mode Capacitor Multiplier

  Authors: Zilin Jiang, Xuan Guo, Hanbo Jia, Jiawei Ding, Yulin Zhang, Kai Sun, Li Wang, Zunsong Yang, Franco Maloberti, and Xinyu Liu

  IEEE Transactions on Circuits and Systems II: Express Briefs • 2026

  A 12-bit 625-MS/s two-step pipelined-SAR ADC with a self-adaptive common-mode capacitor multiplier, achieving 78.8-dB SFDR.

• A 14-GS/s 8-bit time-interleaved SAR ADC with multi-path bootstrapped switch and low-jitter sampling PLL in 28-nm CMOS

  Authors: Jiawei Ding, Xuan Guo, Shan Lu, Qing Su, Tao Liu, Hanbo Jia, Yihan Li, and Xinyu Liu

  Microelectronics Journal • 2025-09

  A 14-GS/s 8-bit time-interleaved SAR ADC implemented in 28-nm CMOS.

Skills