Jiawei Ding

Ph.D. Student at Institute of Microelectronics, Chinese Academy of Sciences (IMECAS)

Advised by Xinyu Liu and Xuan Guo. I work on ultra-high-speed analog-to-digital converters (ADCs), mixed-signal integrated circuits, and practical data-converter architectures.

Jiawei Ding

Research Areas

Ultra-high-speed ADCs

Time-interleaved and pipeline/SAR data converters for high-bandwidth sampling.

Mixed-signal IC design

Analog front ends, references, comparators, buffers, and digital calibration circuits.

Data-converter calibration

Mismatch modeling, time-skew estimation, and robust digital correction methods.

Recent Publications

A 12-bit 78.8-dB SFDR 625-MS/s Two-step Pipelined-SAR ADC With Self-Adaptive Common-Mode Capacitor Multiplier

IEEE Transactions on Circuits and Systems II: Express Briefs • 2026

A 14-GS/s 8-bit time-interleaved SAR ADC with multi-path bootstrapped switch and low-jitter sampling PLL in 28-nm CMOS

Microelectronics Journal • 2025-09