A 14-GS/s 8-bit time-interleaved SAR ADC with multi-path bootstrapped switch and low-jitter sampling PLL in 28-nm CMOS
Published in Microelectronics Journal, 2025
A Microelectronics Journal article on a 14-GS/s 8-bit time-interleaved SAR ADC in 28-nm CMOS.
Recommended citation: Jiawei Ding, Xuan Guo, Shan Lu, Qing Su, Tao Liu, Hanbo Jia, Yihan Li, and Xinyu Liu. (2025). "A 14-GS/s 8-bit time-interleaved SAR ADC with multi-path bootstrapped switch and low-jitter sampling PLL in 28-nm CMOS." Microelectronics Journal, 163, 106770.
Download Paper